1. Field of Invention
The invention relates to extraction of data encoded in an analog signal, and, more particularly, to apparatus and methods for phase selection of a sampling clock signal utilized to extract data from an analog signal.
2. Discussion of Related Art
Cathode-ray tube (CRT) displays utilize an analog signal having an amplitude that controls the intensity of an electron beam forming an image in the display. Since digital data processing devices, such as a personal computers, have commonly utilized CRT displays, the devices typically convert digital image data into an analog video signal that can drive a CRT display. A personal computer, for example, typically converts digital pixel data into an analog signal whose amplitude corresponds to pixel intensity levels; the analog video signal can drive a CRT display in a conventional way.
In contrast to CRT displays, flat-panel displays, such as liquid-crystal displays (LCDs), utilize digital pixel data to drive the display image. Thus, when a flat-panel display receives an analog video signal from a personal computer, it converts the analog video signal into a digital data signal by extracting the pixel data encoded in the analog video signal. The digital data signal in turn can be used to drive the display's image. To accomplish this, the analog video signal is sampled and converted to digital data by an analog-to-digital converting circuit. Such circuits utilize sampling clocks having a frequency and phase selected to appropriately sample the analog video signal.
The phase of a sampling clock signal should be selected to provide sampling of the analog video signal within intervals that correspond to pixel data. If the analog video signal is sampled too close to the boundaries between intervals, errors in data extraction can occur. These errors can lead to fuzzy images.
The phase can be selected in response to the synchronizing signals embedded in the analog video signal. Phase errors can arise, however, from signal delays and other factors. Therefore, a sampling clock phase typically requires manual or automated adjustment. Some displays include hardware and related software to implement algorithms to extract phase information from the digital data signal produced by the analog-to-digital conversion process. Such phase determination approaches can be, for example, cumbersome, error prone, and subject to time-related phase drift.